Commit: 22bae2b0cf06daa76a593ac71afa9d21722e12fc
Parent: f10b4310f76c8483ab4e40d9e71c5c3f9988fac6
Author: Randy Palamar
Date: Thu, 17 Oct 2024 09:52:20 -0600
mark asm sections as volatile so gcc doesn't miscompile us
I thought clang complained about this being unnecessary before but
I can't recreate anymore.
NOTE: now GCC actually produces a faster and smaller binary. Also
with glibc the posix layer is faster so we need to look at what
glibc is doing (even the posix layer makes minimal use of libc).
Diffstat:
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/platform_linux_amd64.c b/platform_linux_amd64.c
@@ -31,7 +31,7 @@ static i64
syscall1(i64 n, i64 a1)
{
i64 result;
- asm ("syscall"
+ asm volatile ("syscall"
: "=a"(result)
: "a"(n), "D"(a1)
: "rcx", "r11", "memory"
@@ -43,7 +43,7 @@ static i64
syscall2(i64 n, i64 a1, i64 a2)
{
i64 result;
- asm ("syscall"
+ asm volatile ("syscall"
: "=a"(result)
: "a"(n), "D"(a1), "S"(a2)
: "rcx", "r11", "memory"
@@ -55,7 +55,7 @@ static i64
syscall3(i64 n, i64 a1, i64 a2, i64 a3)
{
i64 result;
- asm ("syscall"
+ asm volatile ("syscall"
: "=a"(result)
: "a"(n), "D"(a1), "S"(a2), "d"(a3)
: "rcx", "r11", "memory"
@@ -70,7 +70,7 @@ syscall6(i64 n, i64 a1, i64 a2, i64 a3, i64 a4, i64 a5, i64 a6)
register i64 r10 asm("r10") = a4;
register i64 r8 asm("r8") = a5;
register i64 r9 asm("r9") = a6;
- asm ("syscall"
+ asm volatile ("syscall"
: "=a"(result)
: "a"(n), "D"(a1), "S"(a2), "d"(a3), "r"(r10), "r"(r8), "r"(r9)
: "rcx", "r11", "memory"