Commit: f5b33a0debee11db5bbb9c71bcce29c417d5d3a6
Parent: 18e1124466900508e13fd7683eba8c0270aa903b
Author: Randy Palamar
Date: Thu, 6 Aug 2026 21:12:18 -0700
base: aarch64: use isb instead of yield
On arm processors which do not implement SMT (which is the
overwhelming majority of in use arm CPUs) yield is equivalent to a
nop. Instead isb flushes the instruction pipeline which does delay
for a short period and save some power. This is not exactly
identical to x86 pause but is close enough.
The proper way to do these low latency waits is to use wfe (and
mwaitx/umwait on amd/intel) which is on my list of todos.
[0]: https://developer.arm.com/community/arm-community-blogs/b/architectures-and-processors-blog/posts/multi-threaded-applications-arm
Diffstat:
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/base_intrinsics.h b/base_intrinsics.h
@@ -107,7 +107,7 @@
#if ARCH_ARM64
/* TODO? debuggers just loop here forever and need a manual PC increment (step over) */
#define debugbreak() asm volatile ("brk 0xf000")
- #define cpu_yield() asm volatile ("yield")
+ #define cpu_yield() asm volatile ("isb")
#define store_fence() asm volatile ("dmb ishst" ::: "memory")
#else
#define debugbreak() asm volatile ("int3; nop")